Methods and apparatuses consistent with the exemplary embodiments of the inventive concept relate to a memory device, and more particularly, to a memory device maximizing power saving by using a plurality of low power states.
A dynamic random access memory (DRAM) is used as a working memory in computing devices or mobile devices. The working memory provides a temporary storage place for data and programs (or code) to be accessed and executed by a system processor(s). A volatile memory device such as the DRAM performs a refresh operation to retain data bits stored therein.
A refresh operation of the DRAM is controlled by a memory controller. The memory controller cyclically accesses data bits of the DRAM by issuing a refresh command. In addition, the DRAM has a self-refresh mode for reducing power consumption. The self-refresh mode allows a refresh operation to be automatically performed by using an internal counter, and thus, leads to low power consumption. When the DRAM is not accessed for a long time, a self-refresh mode is performed in response to a self-refresh entry command (SRE) and a self-refresh exit command (SRX) by the memory controller.
If power consumption can be further reduced than in the self-refresh mode even while data bits stored in the DRAM are retained, a mobile device including the DRAM would exhibit better performance.